Re: Full Bridge IR 2153 Configuration

["Tesla list" <tesla-at-pupman-dot-com>]

Original poster: "David Sharpe by way of Terry Fritz <twftesla-at-qwest-dot-net>" <sccr4us-at-erols-dot-com>

Hi Ken,
Several questions:

1.  How close was driver to TC resonator?
2.  Was the driver in a metallic enclosure or "open air"?
3.  Appropriate bypassing / MOV protection on "DC rails"?

This chip is designed for fluorescent lamp ballasts, which aren't
exactly quiet (EMI/RFI wise), especially when striking/starting
lamps.  The chips I'm looking to use (IR2153D, IR21531D)
are only 2-3 years old, and have "ESD and EMI/RFI hardening
improvements" over original IR2155 (paraphrasing IR's press
release).  So must have been field experiences like you
mentioned to require a redesign (read "new and improved")
chip.  Not doubting there may be diffculties / sensitivities with
this and thanks for feedback.

Regards
Dave Sharpe, TCBOR
Chesterfield, VA. USA

Tesla list wrote:

 > Original poster: "K. C. Herrick by way of Terry Fritz 
<twftesla-at-qwest-dot-net>" <kchdlh-at-juno-dot-com>
 >
 > A word of caution regarding the high/low-side IR drivers:  I had tried to
 > use that type of IR IC early-on, in my s.s. coil, and seem to have found
 > that the high e.m. field of the secondary interfered with the driver's
 > internal high-impedance high-side coupler circuit--to the extent that I
 > had to abandon the effort and go to a home-made bipolar-transistor
 > h-bridge driver + gate-transformers.  Those interested in those ICs might
 > want to make sure they will withstand the ambient field before committing
 > to pc boards...
 >
 > Ken Herrick
 >
 > On Thu, 05 Dec 2002 22:31:22 -0700 "Tesla list" <tesla-at-pupman-dot-com>
 > writes:
 >  > Original poster: "David Sharpe by way of Terry Fritz
 >  > <twftesla-at-qwest-dot-net>" <sccr4us-at-erols-dot-com>
 >  >
 >  > IR supplied info today for full bridge driver using two (2)
 >  > IR2153's
 >  > A series resistor is wired from Rt terminal of first (master) chip
 >  > and
 >  >
 >  > wired to Ct of second (slave) chip.  A pull up resistor is
 >  > installed
 >  > between Ct of Vcc of second chip to allow minimum voltage
 >  > on Ct to agree with following relationship:
 >  >
 >  > 1/6Vcc (shutdown) < Ct <= 1/3Vcc
 >  >
 >  > According to Applications Engineering, both chips will now be
 >  > running
 >  > in anti-phase relationship to one another (i.e. a full bridge
 >  > driver).
 >  >
 >  > When I build PCB will design board to support master or slave
 >  > configuration (maybe setup via a dip switch or optocoupled
 >  > [isolated] mode).
 >  >
 >  > To support a same phase configuration (as self balancing multilevel
 >  > converter), an inverter must be used between Rt of master and Ct
 >  > of slave chip; a high speed optocoupler will nicely perform this
 >  > isolated
 >  > signal inversion function, and allow galvanic isolation between
 >  > stages.
 >  >
 >  > Now its time to start laying out and assembling some PCB's...
 >  > Still consider a full bridge converter capable of ~2kW for silicon
 >  > cost of < $20.  Incredible...   :^D
 >  >
 >  > Regards
 >  > Dave Sharpe, TCBOR
 >  > Chesterfield, VA. USA
 >  >
 >  >
 >  >
 >  >