Original poster: "K. C. Herrick" <kchdlh@xxxxxxx>
Here's what I'm designing into the delay circuit
that I need, to be interposed, in the overall
feedback circuit, between my "pilot oscillator"
and the rest of the IGBT-driving circuits: 4,
74HC164 8-bit serial in/parallel out shift
registers in tandem, clocked at 5.0 MHz using a
free-running Vishay XO-52B5.0 clock module. The
last 16 outputs of the S-R chain will feed into
a pair of CD4512BC data selectors, which will be
addressed by the 4 LSBs from a TLC0820AC A/D
converter. The MSB of the address drives the
/OE inputs of the selectors, one of them via an
inverter, so as to alternate their wire-Or'd
Tri-state outputs dependent on the address.
The A/D's 0-5 V input will come from a pot,
located15 ft away in the control box. And the
converter will latch its output during spark
events, so that changes in delay may be made only between sparks.
In this way, I will be able to control the delay
of IGBT turn-on/turn-off so as optimally to
align those events with primary current
zero-crossing, as my simulation indicates I can
do. I suspect that I may be able merely to
watch the spark and tweak the pot for maximum,
thereby choosing the delay that produces the
minimum power wasted in IGBT turn-on and turn-off.
Happily, it's all ICs except for a few bypass
capacitors and the pot, so layout & wiring will be relatively easy.
Ken Herrick