Re: [TCML] understanding DRSSTC

[Steve Ward <steve.ward@xxxxxxxxx>]

Herwig,

The self-oscillating drivers like the ones i published on my site
aren't smart enough to know what frequency to drive.  The result is
that you will excite *both* frequencies with this type of control.
This results in a beating RF envelope as the 2 frequencies go in and
out of phase.  If the tuning of both coils is exactly equal, then both
frequencies get the same energy and you will see the envelope notch
all the way back to zero amplitude at 1/k cycles.  Eventually, if you
drive it long enough, the system will settle out to whichever pole has
higher gain (the streamers effect this too).  You already observed
that one pole can be bigger than the other, this is caused by tuning
one coil to a slightly above or below Fres.  This will show an RF
envelope with some ripple in it, as one pole frequency is not
energetic enough to completely cancel the other pole frequency.
Lowering the primary frequency will cause the lower pole to be excited
more.  Raising the primary frequency will excite the upper pole more.

There are fancier methods of control out there as well.  Steve Conner
uses a phase-locked loop to drive his DRSSTCs which allows him to be
frequency selective.  This also introduces more complexity to the
analysis of the system because the PLL has its own transient response.
 Another method that ive been working with is a means of adding phase
to the feedback signal so that my transistors switch earlier than the
primary current zero crossings**.  This will change the operating
frequency of the system slightly, as determined by the phase.

** The reason to switch your transistors before the primary current
switches polarity is to avoid the freewheeling/body diode from going
into conduction before the switching transition.  The reason this is
undesirable is that while the diodes are conducting, the opposing
transistors will turn on forcing a hard turn off of the diodes.  This
results in very large di/dt that causes voltage spikes as well as
increased switch losses.  For a first DRSSTC i would not get too
concerned with this issue, its mostly good for extracting the best
performance from  your transistors.

Steve


On Thu, Jan 31, 2013 at 3:03 AM, Herwig Roscher <herwig.roscher@xxxxxx> wrote:
>
> Hi Udo,
>
> thank you for your response.
>
>> > I *assume* that the system will work at 281 kHz, but do not know why.
>> Usually DRSSTCs are run at the lower pole and they are tuned so that initially the
>> secondary frequency is somewhat (10% - 20%) higher than that of the primary tank.
> - If the natural frequency of the primary circuit is tuned lower than the natural
> frequency of the secondary circuit, *both* poles move downward. So far so good.
> In my understanding the feedback of DRSSTCs causes the system to oscillate. Which
> component(s) influence the frequency of oscillation/the pole which is used? And what
> means "...DRSSTCs are *run"..."? Which means except tuning the primary circuit do you
> have to influence the operating frequency?
>
> Regards,
>
> Herwig
>
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