Re: [TCML] understanding DRSSTC

[Antonio Queiroz <acmdequeiroz@xxxxxxxxx>]

Em 12/02/2013 07:49, Udo Lenz escreveu:
>    Hi Antonio,
>
> > I wrote a document with some simulations of a DRSSTC, designed with 
> > the method that I have developed:
> > http://www.coe.ufrj.br/~acmq/tesla/drsstcexcitation.pdf
>
> The central frequency can be made to match the secondary resonant 
> frequency.
> If you run at this frequency, the operating frequency will be equal to 
> the secondary
> frequency and this will give you the highest possible power transfer 
> to the secondary.
In my simulations this was close, but not exact. The secondary resonance 
is at 283886 Hz and the driving frequeny is 294427 Hz.
The result with excitation at the secondary resonance results in 
slightly slower output rise and the full beats in the unloaded case 
disappear.
> The pole frequencies can never coincide with the secondary frequency 
> due to the
> coupling, so that running at their frequencies will require more 
> primary current
> to achieve a given power transfer.. I believe, this is what you observed.
I agree.
> But the central frequency has disadvantages: Consider a simple series 
> tank.
> If you drive it below the resonant frequency the current phase will 
> lead the
> input voltage. A PLL circuit would detect that and increase the 
> frequency.
> The central frequency has the opposite behaviour. There a drop in the 
> frequency
> leads to a current lagging the voltage. The PLL wouldn't lock on to it.
> The pole frequencies on the other hand show the "normal" behaviour.
But this system has two resonances. Looking at the frequency response of 
the system, what I see is:
At the poles the input impedance is never purely resistive, and is 
purely reactive in the unloaded case,
inductive above and capacitive below.
At the central frequency the input impedance is purely resistive, with 
any resitive load at the output.
Greater load widens the frequency range where the input impedance is 
approximately resistive.
A PLL controlled by the input current would lock correctly. There is 
just a possible problem, because
as in the unloaded case there are full beats of the input current, and 
if the driver is not turned off
after the first beat, the PLL will invert the operation of the driver, 
causing a great increase in the input
current. In the lightly loaded case this also happens. A PLL would not 
lock at the pole frequencies. It
would move the driving frequency to the central frequency automatically.
> You could invert the feedback of the PLL, so that it locks onto the 
> central
> frequency, but I think, this is a fragile mode of operation, since the 
> inverted
> phase relation holds only between the poles. A glitch or a ground arc 
> might throw
> the PLL off.
It's really confuse what to do with a PLL if the system is designed to a 
certain maximum number of
cycles per burst and allowed to exceed this number. I am a bit sceptical 
about the use of a PLL in these
systems with short bursts. It would be useful only in really long 
bursts, because of the number of cycles required to
lock. And note that the ambient has heavy interferences.
> Under heavy arc loading the central frequency will disappear. I believe
> this to happen at about Qsec = 1/k In your simulation with k=0.12 that 
> would be around Qsec = 8.
> I've made measurements of arc load at 70kVpeak (at about 200kHz) and 
> they give a
> load resistance of about 100k. With the parameters you used, Qsec 
> would drop to
> about 2 with a 100k load.
I don't see it disappearing with any load. In the sense that the input 
impedance remains always resistive.
What happens with heavy load is that the two resonances become damped 
and both move to the
central frequency, resulting in just one peak in the voltage gain.
> My measurement was made under QCW conditions,
> so that the arc had time to grow to its final size. With short burst, 
> I'd expect the arc load
> to be smaller. Nevertheless low Qsecs don't seem to be exotic. Under 
> these conditions you'll
> have only one ZCS frequency with a "normal" frequency-phase shift 
> relation. An inverted
> PLL will fail then.
With heavy load, as I said above, the two peaks disappear, and a PLL 
would really make the system
operate at a pole frequency, because both pole frequencies are 
identical, at the central frequency
(with different Qs).
If you are using a PLL, compare the frequency where it operates at the 
end of a long burst
with arc load with the two pole frequencies of the unloaded system. It's 
true that arc load adds
capacitance to the secondary and changes the tuning of the system, so I 
would expect the final
frequency to be somewhere below the central frequency. Or you can 
operate the system with
small arcs, so the unloaded tuning is preserved.

Antonio Carlos M. de Queiroz


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