[TCML] SSTC half bridge

["Herwig Roscher" <herwig.roscher@xxxxxx>]

Hello,

I am planning on building a SSTC, driven by a half bridge of
POWERMOSFETs. Searching the archives and the web, I found two
topologies:

a.          +340 V
                 |
         upper FET
                 |
                 *------ primary coil-----
                 |                                    |
          lower FET                         = dc blocking capacitor
                 |                                    |
             GND                             GND


b.         +340 V
                 |
                 *----------------------------
                 |                                    |
          upper FET                        =  dc blocking capacitor
                 |                                    |
                 *------ primary coil-----*
                 |                                    |
           lower FET                        = dc blocking capacitor
                 |                                    |
             GND                            GND

What are the pros and cons for these circuits? Could somebody please
enlighten me?

Regards,

Herwig

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