Re: ALF: why not DRSSTC?

["Tesla list" <tesla@xxxxxxxxxx>]

Original poster: Jimmy Hynes <jphynes@xxxxxxxxx>

Hey,


On 9/25/05, Tesla list <<mailto:tesla@xxxxxxxxxx>tesla@xxxxxxxxxx> wrote:
Original poster: Greg Leyh <<mailto:lod@xxxxxxxxxxx>lod@xxxxxxxxxxx>

Hi Jimmy, Steve, Terry,

For simplicity, allow me to respond to both of your comments together here.

Part of the problem I have had in grasping the OLTC and DRSSTC
concepts is that I haven't found a concise one-sentence description
for either of them.  For instance, I had thought that OLTC addressed
the techniques for 'Off-Line' operation of a Tesla Coil.  Does the
term also refer to the general case where a single solid-state device
replaces the spark-gap in a classic impulse-type Tesla Coil?



Like Conner said, it only counts as an "OLTC" if it uses IGBTs to 
directly replace the spark gap. How you charge the capacitor between 
bursts is completely separate from how you transfer the energy to the 
secondary, but I guess it wouldn't really be "OL" if you use some 
fancy charger to get to 10kv or something. When I say OLTC, I just 
mean using IGBTs as a direct spark gap replacement.

In my simplistic view of coil design space, there are two types of
Tesla coils -- Impulsive and CW.  Impulsive TCs discharge the primary
cap over a period that is small compared to the charge time.  CW
coils provide a continuous-wave drive to the primary.  The basic
design philosophies for impulsive and CW coils are fundamentally different.

Adding solid-state switching devices doesn't change the basic
operation of these coils.   Impulse TCs can use static sparkgaps,
rotary sparkgaps, hard-discharge tubes, and solid-state devices.  CW
TCs typically use electron tubes or solid-state devices.  Rather,
solid-state devices offer dramatic improvements in efficiency,
compactness and quenching accuracy.  Increased reliability and fault
tolerance has yet to be proven, but the potential is certainly there.

The OLTC is clearly an Impulse-type TC; it stores the full bang
energy in the primary cap then transfers the energy to the secondary
quickly, compared to the bang period.  The fundamental operation of
the coil itself is the same as a classical sparkgap coil.  By
contrast, the DRSSTC is not clearly an impulse-type nor a CW coil; it
contains essential features of both designs.  Like CW systems, the
DRSSTC uses feedback to control the freq and phase of the primary
drive elements.
However, the DRSSTC attempts to gain some of the pulsed-power
benefits of an impulse-type coil by concentrating power delivery into
shorter, more intense bursts, at a rep rate suitable for sustaining
an arc channel.

The DRSSTC is the first example I've seen of a coil design that
explores quasi-CW operation in this fashion, although there might be
similiar examples of pulsed CW TCs of which I'm unaware.  For this
reason the DRSSTC might qualify as a *third type* of Tesla Coil,
owing to its quasi-CW nature.  It appears that the full-wave bridge
drive isn't essential to the quasi-CW operation, so I would view the
full-wave aspect more as research into alternative primary drive techniques.


Yeah, there's no clear distinction between where it stops being 
'impulse', and starts being CW.


Jimmy Hynes wrote:

>What's your trick for doing it "quickly"? The DRSSTC also sucks the
>energy back out of the secondary. If you don't think it's quick
>enough, we could probably implement the same sort of 'trick' you got
>to do it quickly.

No tricks, other than higher coupling and accurate quenching.


Ok. The same can be done with a DRSSTC.

  Also,
if one chooses a coupling value near one of the 'Magic-k' values,
it's possible to achieve both zero-voltage and zero-current switching.
However, if you transfer the energy that fast, is it still a
DRSSTC?  At what point does it become a standard impulse-type TC?


It is possible to run near the "Magic-k" values, and "quench" at the 
second notch, letting the energy build up more than is possible in one beat.

As long as you're running at least a cycle, it's operating 
differently than the "normal" type, but it can still be very much an impulse.

If you use the detuning trick, the coil won't breakout at all for the 
first 20 cycles or so, and the streamers form only on the last couple 
cycles. From the streamers point of view, it is not CW like at all. 
This case is interesting because the inverter's peak power is 
relatively low due to the long ON time, but all the energy gets 
dumped in the streamers rather quickly.

>300PPS!?!? Why so high? Even much smaller coils find better
>efficiency at half that. Bigger coils seem to need less PPS (which
>would make sense with the square/cube law thing going on with the
>streamers), so a huge coil should need rather low repitition rate.
>With your concern with the RTC thing, that was a real suprise to me.

Based on my personal experiences with the 40kW experimental coil and
the 130kW Electrum.  The 40kW coil would display continued streamer
growth up to ~350PPS.  Electrum seemed to top out at around
270PPS.  I certainly appreciate the squared/cubed argument for arc
channel heat retention, and I would expect larger arc channels to
require lower break rates.  However, it would seem an unnecessary
risk to reduce the break rate capacity of the machine if it can be
avoided.  The break rate can be reduced later, much easier than it
can be increased.


While I certainly agree that it's good do design for a higher PPS 
than you need, I still find 300PPS to be excessive.

If you're goal is to make the biggest streamers possible, it might be 
easier to design for super high break rate instead of trying to jack 
the bang energy up, but if you're worried about efficiency at all, 
you're gonna keep the break rate down. By using a low breakrate, it's 
almost certain to have more of an efficiency benifit than the RTC could give.

I am suprised that your coils showed an increase up to such a high 
break rate. Do you have any idea what the PPS/spark length curve looked like?

>With a DRSSTC, you could use the whole time to charge the
>capacitors, since its just a DC rail.

This is true, although one could conceivably add a high capacity DC
rail to the front end of any primary drive topology.


Right.

 The problem
with adding a high energy storage DC rail is the potential for
creating utter carnage in the event of a circuit fault. One example
is a recent klystron modulator design, which employs full-wave IGBT
bridges driving resonant step-up transformers.  Average power is
~1MW.  The DC rail is 2500V, and has enough rail capacity to supply
one pulse.  Break rate is 60PPS.  Here's what happened as a result of
shoot-through current in the H-bridge:
<http://www-group.slac.stanford.edu/esd/HbridgeDebris.jpg>http://www-group.slac.stanford.edu/esd/HbridgeDebris.jpg
ALF will operate at roughly 6x the total power.  It will be highly
desirable to avoid large energy storage requirements.


I see what you're saying, and agree that you wouldn't want the 
capacitor to hold much more than necessary, but that doesn't change 
the fact that you can be charging the capacitor nonstop. There may be 
a ton of ripple, but the capacitor isnt oscillating, it is just 
supplying DC power, so it can be charged without waiting for the bang to end.

Steve Ward wrote:

>>C)  Managing circuit reliability and total parts cost, with the
>>larger number of IGBTs that a full DRSSTC H-bridge requires.  -GL
>
>But, you are talking of using a 12kv supply, requiring seriesed
>switches, while you might obtain the same results from an H-bridge
>running at a lower voltage.

This is true.  However the reason I would prefer using a single,
series-connected switch array at twice the voltage is simply to
mitigate the hazards of single-point failures.  In the standard
single-switch design, all the IGBTs are turned on simoultaneously,
avoiding the possibility of timing errors between opposing IGBT banks
causing short-circuits.  Each IGBT in the stack can protect itself
against overvoltage by turning back on momentarily.  Also, a series
switch stack will tolerate failures of individual IGBTs, since they
are intentionally designed to fail shorted.


Well, in one case, you have to worry about timing to prevent short 
circuits, in the other, you have to worry about timing to prevent 
overvoltage. Just as IGBTs can turn on to prevent overvoltage, they 
can turn off to prevent short circuits.

It's just a question of which would be easier to design. No one 
really has problems with short circuits unless one IGBT dies for some 
other reason, and an overcurrent protector would not be difficult to 
implement.

>To quote from your other post:
>
>>" I believe that it's not only possible, but essential to determine the
>>best topology at the beginning.  Simulations can accurately model
>>much of the complex behaviour exhibited by TC's, and good
>>physics-level models now exist for the HV IGBTs."
>
>Exactly, this is the only true reason i asked this question to begin
>with.  I wanted to know if the DRSSTC topology (or something
>similar) has been considered.

No, I have not yet considered a quasi-CW mode of operation or a
full-wave primary drive scheme.  However, I am curious about the
DRSSTC theory of operation and would like to run some simulation studies.
Perhaps then I'll have some better questions to ask.


Ok, run some simulations and get back to us ;-). I'm still convinced 
that it's the way to go :P

-GL