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Re: DRSSTC stablity/ closed loop response



Original poster: "Antonio Carlos M. de Queiroz" <acmdq@xxxxxxxxxx>

Tesla list wrote:

Original poster: "Bob (R.A.) Jones" <a1accounting@xxxxxxxxxxxxx>

I did consider doing it analytically and looking for poles in the right hand
half of the s plain. But I settled for numerical analysis just adding a
feedback block to the transfer function (TF) as B or B/s (90deg lag, I did
not  try s/B for the lead case). Then adjust  the constant B while I looked
for zero or 180 phase points that have gains more than one the condition for
oscillation when you connect the output to the input. I am rusty on what
happens if the gain is greater than one but with the wrong phase.  So I
closed the loop and used the classic A/(1+A/B) checking with B and -B
varying the feedback gain and looked for peaks. Got two at the spit
frequencies. That case looks like it would only oscillate the center
frequency with a fancy filter in the loop say a PL which can also provide
the 90 deg phase shift. I failed to confirm that the polarity of the
feedback determines which pole it oscillated at???
I have now tried the primary current feed back case now. TF from  Vin to Ip.
Three zero phase points the two outer with the same slope and opposite to
the middle one. This could have the potential to oscillate at the mid
frequency or one or other or both of the split frequencies depending on the
polarity of the feedback. Close the loop again with a variable gain block
and adjust polarity. 90 deg phase shift not required this time. Then add a
block for Ip to output voltage
 Initial results produce the same two outer peaks independent of the
polarity of the feedback ?????  I need to check the equations  again. I
favor current feedback because it guarantees softswitching , no extra
connections and provides better isolation from the vagaries of the secondary
caused by streamers and ground strikes.

A problem that I see is that the feedback block is strongly nonlinear.
Its output has always the same amplitude, regardless of its input
amplitude.
I was tweaking the simulator that I implemented in my design
program sstcd, to simulate an input signal controlled by one of the
circuit variables. So far I have implemented only feedback from the
input current. The simulator simply considers that the polarity of the
input voltage is determined by the polarity of the input current, as
if the control were passed to a simple comparator after a predetermined
time. What I can observe is the following:
Design for excitation between the resonances: Without load, the waveforms until the point of complete energy transfer are identical to the ideal case (actually, the last peak is slightly smaller). The
waveforms show complete beats. If the driver is allowed to continue in
operation after the instant of complete energy transfer, it reverts
polarity and continues to pump more energy into the system. All the
signals double in amplitude in the second beat, are three times
larger in the third beat, and so on. With load, again ideal waveforms
until the first maximum, with differences (larger signals) afterwards.
Design for excitation closer to one of the resonances: These modes
result in hard switching if the input frequency is fixed. When the
comparator assumes control, the system tends to lock close to the
frequency that is at greater distance from the designed excitation frequency.
The transition between the different cases is continuous, with the
waveforms showing incomplete beats if the design excitation frequency
is close to the center between the resonances.
In all cases, the largest output voltage is obtained, at the first
maximum, with the design for excitation between the resonances.


Antonio Carlos M. de Queiroz