Re: DRSSTC design procedure - draft

["Tesla list" <tesla-at-pupman-dot-com>]

Original poster: "Antonio Carlos M. de Queiroz" <acmdq-at-uol-dot-com.br> 

Tesla list wrote:
 >
 > Original poster: "Steve Conner" <steve.conner-at-optosci-dot-com>
 >
 >  >Mode 11:13:15:
 >  >http://www.coe.ufrj.br/~acmq/tesla/dr111315.gif
 >
 > I'm a bit worried by this. On the 4th half cycle of primary current, ILa
 > peaks as Vin passes through zero. This means that the inverter has to hard
 > switch nearly its whole rated current.

Ila, the input current, is the yellow line. It crosses zero almost
simultaneously with Vin in all the zero crossings of Vin, except the
last before the energy transfer is complete (at 2 seconds in that
normalized simulation). The same happens in higher modes.

Antonio Carlos M. de Queiroz