RE: Conceptual Diagram - NEW Advanced SSTC Controller

["Tesla list" <tesla-at-pupman-dot-com>]

Original poster: "Steve Conner" <steve.conner-at-optosci-dot-com> 

 >Per a few requests, I am posting the conceptual diagram of my new
 >Advanced SSTC Controller.

Every microcontroller based SSTC I've seen (ie two) has had to use a 10-turn
pot adjusting the uC clock frequency to get fine enough control of the
frequency. If you want to do it all digital, you'll need to use some kind of
DDS, either in firmware or hardware. I just designed a 0-40MHz DDS at work
using the AD9850 chip, it was quite easy as the AD9850 does everything, and
it only costs $11. You set the frequency with a 32-bit register giving a
resolution of 0.02Hz :-0

With a chip like this the output frequency is high enough that you could
divide it by 128 in a counter/comparator, giving you 128 levels of digital
PWM, so you could do away with a separate Class-D modulator. With only 7
bits of resolution, it would hardly be hi-fi, but should be ample for
studying the effects of envelope on streamer growth.

Good luck! Personally, I think any chip bigger than a 555 is overkill for
Tesla coiling ;) I used 74HC logic chips once but I didn't feel too
comfortable with it :))

Steve C.