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A triggered-s.g. 1-turn primary
Original poster: "K. C. Herrick by way of Terry Fritz <teslalist-at-qwest-dot-net>" <kchdlh-at-juno-dot-com>
I take note of jimmy hynes/Terry Fritz's posting of 4/28 but submit this
posting anyway, which I had been preparing.
In another periodic retreat from solid-state exasperations, I have come up
with a notional spark-gap design,
<http://hot-streamer-dot-com/temp/tspk13s2.pdf>http://hot-streamer-dot-com/temp/tspk13s2.pdf.
You will need Acrobat Reader for that. (I note that gif format yields a
lousy image, derived using Photoshop either from my CAD program's exported
pcx or from a scanned print of the drawing. The pdf image seems just
lovely--similarly derived from a print. Computer mysteries...)
Referring to the drawing, six "6C"s, six "1/6 L"s, six "1/6 R"s and six
spark gaps are connected in a circle on the secondary's nominal diameter
(in my case that would be 12"). Six 6Cs in series yield C and six 1/6 Ls
in series yield L. L and C resonate at the secondary's Fr when the 6 spark
gaps fire. Each 1/6 L is merely the sum of a 6C's internal inductance +
the spark gap's intrinsic inductance + the interconnection inductance of
that segment of the primary loop, as arrayed on the nominal 12"
diameter. Each 1/6 R is the sum of spark-gap, 1/6 C and interconnection
resistances in its segment. All of those elements constitute a 1-turn
primary. The secondary is to sit right on top of it--resting, perhaps,
directly on the capacitors.
Each 6C has applied to it switched AC-mains input, coupled via windings of
a T1 and a T2 operating as chokes. The AC is a sine wave that is
interrupted using two power MOSFETs, two IGBTs or a triac, not shown. The
switching circuit is turned on during each mains 1/2 cycle at the
approximate voltage peak, staying on for 1/4 cycle and thus delivering a
step-voltage via the T coils to each 6C. The coils in the Ts resonate with
each 6C so that, a few milliseconds after each step, the voltage on each 6C
reaches about 275 V (as simulated with MOSFET drivers) with 160 V peak from
the mains.
Phasing of the T1s and T2s is such that the resonant-charging currents'
induced voltages in their series-connected second windings are of opposite
polarity & thus the series connections exhibit 0 V during the charging
time. All 6 second-winding pairs are connected to a bus-pair that is
driven via a break-over diode from one of the 6Cs. Because of the phasing,
the break-over diode sees only the voltage on the 6C. The Ts are to be
physically located close to the physical center, to minimize the Fr flux
intercepted by them and their interconnections.
During charging, each gap sees twice the voltage on a 6C. Just prior to
the resonant-peak (absent breakdown), the diode breaks down and applies the
6C's voltage to all six T-winding pairs in parallel. This action induces
voltages into the charging windings such as to momentarily increase the gap
voltages, sufficient to cause the gaps to break down. Again, during the
spark event, the coil polarities are such that each pair of trigger
windings exhibits no induced voltage. Note that alternating trigger-coil
pairs are connected to the driving bus oppositely. Thus the trigger
voltages on alternating primary-loop segments are of opposite polarity,
doubling the trigger voltage seen by each gap.
The turns ratio in each T might need be no larger than 1:2 for reliable gap
firing; 1:1 and perfect transformers would cause the gap voltages to
increase by a factor of 1.5. Also, all the Ts could well be consolidated
onto just two cores with one trigger winding on each core. The 20 mH (in
my simulation) is not critical; a whole lot smaller and the peak mains
current becomes excessive while a whole lot larger, the charging time
becomes excessive.
As soon as the gaps break down, the damped sine wave loop-current at Fr
commences flowing. The 6C-charging T-coils then act to isolate the mains
from the spark gaps during the firing event while a simple clipping network
at the MOSFET/IGBT/Triac output clamps the pk-pk voltage there to less than
~+/- 250 V--again, as simulated. I've added a small R-C damping network as
well, to soak up most of the Fr signal there.
The gaps keep conducting until the Fr current becomes too low, which will
occur well before each following initiation of capacitor charging, ~8 ms
later at 60 Hz mains frequency. They are to have extremely close spacing,
perhaps 0.02" or so and thus will dissipate relatively little power.
Since the capacitor charges for each half mains-cycle are of opposite
polarity, any tendency for metal to transfer across the gaps should be
minimized because the DC component of the gap current will alternate from
one mains half-cycle to the next.
I show 115 VAC input but 240 V could be applied just as well. I've
simulated the circuit using 40 uF for 6C, 33 nH for 1/6 L, 5 m-ohms for
each 1/6 R and 20 mH for each charging-coil of T. I've not simulated the
trigger scheme except for using a "switch" for each gap and turning those
on for 500 us after the delay time. The scheme works just fine in that
simulation: Fr is about 125 KHz and the peak first-half-cycle loop current
is about 9 KA with no simulated additional switch voltage-drop. At 120 V
in, the line current is about 15 A RMS, 30 A peak. The Fr current
diminishes to 1 KA at the 4th cycle (no secondary present).
A 30 m-ohm total loop resistance is perhaps too optimistic. Higher
resistance will, of course, diminish the peak current and also the number
of Fr cycles that will occur prior to gap-extinguishing. With 100 m-ohms
total, I get only ~7 KA peak Fr current and that diminishes to 500 A in
just 1 1/2 cycles; likely not enough excitation to produce much of a
spark. Thinking that perhaps two rather than 1 turn would be better (if Q
= X/R, X would be 4x, R would be 2x, perhaps, so Q would be about
doubled--right?), I temporarily added 600 nH and 60 m-ohms into the
loop. I got 4 KA peak diminishing to 500 A in 2 1/2 cycles & whether
that's an improvement, I don't know. I didn't bother to alter the 6C
values to bring Fr to the same frequency.
It does seem to me that with too-high a dv/dt in the first half-cycle,
there might be the risk of secondary turn:turn voltage breakdown. Would
the lower dv/dt and higher Q be better? Perhaps someone else has already
considered that kind of thing & I've not paid attention.
Clearly more primary segments could be added for more power--but cramming
more capacitors& gaps into the nominal diameter might present a problem.
I could use some informed comment on this. Perhaps it's all too fanciful...
I'd be happy to email my SIMetrix simulation-schematic file to anyone with
SIMetrix and a real interest in the design. Or, perhaps someone would care
to simulate it otherwise, using the pdf drawing as the source.
Anyone interested enough to consider building it??
Ken Herrick