El Supremo

["Tesla list" <tesla-at-pupman-dot-com>]

Original poster: "K. C. Herrick by way of Terry Fritz <twftesla-at-qwest-dot-net>" <kchdlh-at-juno-dot-com>

Terry Fritz's groundbreaking work with the OLTC has given me pause to
think about my own design and how it might be improved.  Also constantly
in my mind is an appreciation of the ratio of my MOSFET failures to his
IGBT failures: it's infinity, not to put too fine a point on it, since
dozens upon dozens have failed for me and none have failed for him.

Terry's 1-turn-primary design is what I had had in mind in the first
place, but my MOSFETs would not drive 1 turn and IGBTs back-then seemed
too slow.  But now, I see a way to combine Terry's notion and mine.  I
call it, perhaps with some want of humility, El Supremo.  With Terry's
indulgence you can find its conceptual schematic at 
Http://hot-streamer-dot-com/temp/tch2.gif.  See also the accompanying
http://hot-streamer-dot-com/temp/tch2drv.  

Referring to TCH2, all IGBT "1"s conduct during one half-cycle and then
all "2"s conduct during the alternate half-cycle.  If you follow the
current paths you will find that the four quadrants of capacitors become
connected in a "daisy chain" around the primary loop in alternating
polarities, thus establishing the requisite alternating magnetic field
perpendicular to the image.  
Each set of IGBTs is driven by a crossover-controlling circuit like that
of TCH2DRV.  

Note that, during each brief interval between half cycles when no IGBTs
are conducting, the "inductive kick" of the primary loop will become
clamped, regardless of its polarity, by the "fast diodes", as coupled via
the loop capacitors.  No transistor will ever see any voltage greater
than twice a capacitor voltage.

Now here is where a major difference with my present design comes in:

The fundamental difference between sstc's and spark-gap tc's is that the
former generates its spark by application of a constant-amplitude burst
of excitation whereas the latter generates an exponentially-diminishing
amplitude of excitation.  This means that by far the greatest amount of
instantaneous energy going into the spark is delivered, in a spark-gap
system, during the first few cycles of excitation.  It does not escape
notice that, given the same mains input-power, a spark-gap coil will
produce significantly longer sparks than a sstc--even given the
relatively large loss of power in the spark gap.  So, it is very likely
to be concluded that what's wanted is to cram as much power as possible
into those first few cycles.

So what I propose with TCH2 is that the capacitances be markedly smaller
that what I have in my present design.  In fact, they are to be small
enough to give the desired rate of exponential decline in voltage during
each spark event.  Note that the current in all the capacitors is
unifirectional, not ac and that the primary is still untuned.  The
capacitor voltages just decline during the spark event, they do not
change polarity.  And since the IGBTs are to be driven from an external
signal source, that source can either be tuned at will to match the
secondary's Fr or it may readily be derived directly as a function of the
secondary's return-current, as I do presently, to make the system
instantaneously self-tuned to the secondary's Fr.

Most importantly, this scheme acts to completely separate the function of
frequency-determination from the function of spark-energy storage. 
Change the frequency?  Just do it: the energy available to create a spark
won't change.  Increase or decrease the primary's time-constant?  Just do
it: the frequency won't change. 

And notice one more interesting thing:  I show the capacitors as being
connected to the primary buses all along their lengths.  I think that it
doesn't matter where they are connected since a) their current is
unidirectional and b) the current in each of the buses is unidirectional.
 There exists the same length and locus of conductor regardless of where
a capacitor is connected.  The advantage is that a large number of small
capacitors may be closely attached to the conductors, both maximizing
their overall current-carrying capability and minimizing their lead
inductances and the overall ESR.  Also, it's a handy place to put
them--all around the periphery of the primary.  I envision two
1/2"-diameter copper pipes for each segment, spaced vertically perhaps
1/4" apart and with the capacitors' leads soldered to their outer
peripheries.  Easy to assemble, easy to change the capacitors.

I show 4 primary segments in TCH2 but could be any even quantity.  Also,
the capacitors could be charged in various ways, for example from
current-regulating supplies as in my present design or resonantly as in
Terry's OLTC design.

Current-sharing amongst the paralleled IGBTs should not be a problem:  A
very small emitter resistor developing perhaps 0.2V at peak emitter
current should suffice to steer current away from the stronger
transistors into the paralleled weaker ones.  Such a resistor might well
consist merely of the lead connecting each IGBT's emitter to the common
point.  Further, avalanche-breakdown should never be a problem since no
transistor can see any voltage greater than twice a capacitor voltage
under any condition.

And finally, this is a low-voltage design.  I remember, when I was a kid,
that the president of the ARRL was killed by his ham apparatus' high
voltage.  That's always stuck in my mind.

It seems to me that this idea has great potential.  I hope I will
personally have the energy to look further into it & build it and I urge
others to contemplate doing so.  Or else...to contemplate telling me that
it won't work.

Ken Herrick