Re: SSTC, xfmr gate drive oddity

["Tesla list" <tesla-at-pupman-dot-com>]

Original poster: "Antonio Carlos M. de Queiroz by way of Terry Fritz <twftesla-at-qwest-dot-net>" <acmq-at-compuland-dot-com.br>

Tesla list wrote:
> 
> Original poster: "Jan Wagner by way of Terry Fritz <twftesla-at-qwest-dot-net>"
<jwagner-at-cc.hut.fi>

> The signal at X on the mosfet gates is a clean square 0V<->13.6V signal
> like it is supposed to be. When the xfmr is not connected, the sources'
> node at Y follows 0V<->12V too.

Without output current, just the Cgs capacitances of the mosfets are
enough to couple the input to the output.
 
> But, as soon as I connect the xfmr, the square signal measured at Y "gets
> smaller" in amplitude. The square wave centers around 1/2*13.6V = 6.8V,
> but now goes only from 4V<->9V instead of 0V<->13.6V. I.e. peak to peak is
> now only 5V instead of 13.6V. It is till a good square wave, though. But,
> the 1:1 transformer output is now -2.5V<->+2.5V (and this is also seen on
> the primary side of course). Not the expected -6.8V<->+6.8V.

With output current, the gate-source voltages must be above the
threshold
voltages of the mosfets, and somewhat higher to allow for significant
current. This may be several volts easily. 
 
> The mosfets should be clamping point Y to 13.6V and 0V in turn, right?

No. Only with gate drive exceeding this range.
 
> Any ideas, tips, etc, would be highly welcome!
> That is how to get the full +-6.8V voltage swings accross the pulse
> transformer primary? Because +-2.5V is really on the weak side.

A possibility is to interchange the mosfets. You will have then a CMOS
inverter, that will produce almost +13.6 to 0 output with 0 to +13.6
input. The switching must be fast, or include a level shifter at the
input to impede simultaneous conduction of the two mosfets.

Antonio Carlos M. de Queiroz