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Re: A question about SSTC tuning
Original poster: "K. C. Herrick by way of Terry Fritz <twftesla-at-qwest-dot-net>" <kchdlh-at-juno-dot-com>
Alex (& all)-
Either 0 or 180 depending upon the relative winding directions of the
primary & secondary. I incorporate a set-up switch to select 0 or 180
phase, taking either the input or the output of an inverting amplifier
for the purpose.
For the amplification, I am just using several 5V CMOS inverting logic
gates daisy-chained, capacitively coupled and "linearized" using input-
and feedback-resistors. The output of the last one of those is
essentially a rail-to-rail square wave and that then feeds to several
additional logic gates for phase selection, on-off gating and MOSFET
drive-generation. I derive a 2-phase 5V pair of signals from that
circuit which drives a gain-of-3.5 H-bridge signal-distributing
amplifier. The latter, in turn, drives 4 similar (but gain-of-1)
H-bridges that in turn drive the MOSFETs--6 pairs of IRFP460A MOSFETs per
each of the similar bridges. Interposed between the H-bridges and the
MOSFET groups are isolating transformers and also crossover-controlling
circuits that act to prevent both MOSFETs in each pair from coming on at
the same time.
I've not specifically measured the circuit gain; there's enough to
generate enough noise initially to get the oscillation going and also, of
course, to yield solid square waves for driving the MOSFETs.
I've been offering my design plans for US$30 in the U.S., $35 for
overseas mailing. It's a lot of printing: 19 pages of circuit
description + 7, 11"x17" CAD-generated drawings. They are "as-is" plans
and not specific "how to do it" plans. Contact me off-List if you want a
set.
Ken
Oakland, CA USA
On Sun, 04 Aug 2002 12:12:23 -0600 "Tesla list" <tesla-at-pupman-dot-com>
writes:
> Original poster: "Alex Crow by way of Terry Fritz
> <twftesla-at-qwest-dot-net>" <alexcrow-at-blueyonder.co.uk>
>
> Hi Ken,
>
> I presume the amplifying chain itself should have a 0 degree shift
> with this
> method, or should it be 180 degrees (ie inverting)? And how much
> gain do you
> think is required - I assume that a single bipolar push-pull stage
> followed
> by a buffer amp, such as two common-collector bipolars again in P-P
> (to give
> plenty of current for gate drive) and then the power FETs should be
> enough?
> For matching of the ouput stage, would common-source or common-drain
> be the
> right way to go?
>
> Thanks
>
> Alex
>
> On Saturday 03 August 2002 11:36 pm, Tesla list wrote:
>
> >
> > With sufficient gain, circuit noise in the amplifying chain will
> get the
> > first half cycle going quite smartly, and then the diode voltage
> will
> > take over.
> >
> > It has worked like a champ for me.
> >
> > Ken Herrick
> >
> >
>
>
>
>