Re: Solid-state status

["Tesla list" <tesla@pupman.com>]

Original poster: "Kennan C Herrick by way of Terry Fritz <twftesla@uswest.net>" <kcha1@juno.com>

Hi Richie-

Thanks for the suggestions.  See my response this date to another
posting.  The basic circuit I'm using is per my U.S. patent #6,069,413
which covers connecting driving transistors in a dual "current ring" to
form a 1-turn primary.  I've decided to reconfigure it for a more
conventional driving scheme, which will result in much shorter leads. 
Will advise!

KCH

On Mon, 18 Dec 2000 11:29:00 -0700 "Tesla list" <tesla@pupman.com>
writes:
> Original poster: "R.E.Burnett by way of Terry Fritz 
> <twftesla@uswest.net>" <R.E.Burnett@newcastle.ac.uk>
> 
> 
> Hi Ken,
> 
> There are a couple of things that you can do to minimise the
> "Miller" effect (caused by MOSFET Gate-Drain capacitance.)
> 
> 1. Reduce the impedance of the gate drive circuit.  This involves 
> minimising stray resistance and inductance in the entire gate-source 
> loop.
> You could use a twisted pair if it is not practical to locate the 
> driver
> stage close to the MOSFET gate terminals.  Keep PCB traces like 1/2" 
> or
> shorter in length,  and only add enough resistance to damp ringing.
> 
> 2. Apply a small negative bias to the gate with respect to the 
> source of
> the device that is intended to remain off.  If the gate is biased to 
> -10V
> when off then the Miller effect must cause almost 13volts rise in 
> the
> gate potential in order to risk spurious turn-on.
> 
> ( The negative gate bias method is a very effective "Miller killer" 
> but it
> has one disadvantage.  Turn-on delay is increased because the gate 
> now
> has to be charged to the threshold voltage from -10volts or so ! )
> 
> I am not sure of your circuit topology (it is not published anywhere 
> ?)
> so I cannot really suggest any other tricks.  But,  I hope this info 
> is of
> some help.
> 							Cheers,
> 
> 							-Richie,
> 
> > Original poster: "Kennan C Herrick by way of Terry Fritz
> <twftesla@uswest.net>"
> > <kcha1@juno.com>
> > 
> > Holiday madness being upon us, my T.c. work has slowed.  But some 
> may
> > have interest in the current problem:  Turns out my gate-drive 
> lines are
> > too long.  Some ringing but the more serious problem is Miller 
> current at
> > MOSFET turn-off, causing turning on again of those that are 
> supposed to
> > be going off, by virtue of the voltage drop in the too-long lines. 
>  Such
> > turn-on is a major no-no, of course, so I am having to re-do my
> > gate-driving scheme.  It will take some semi-major 
> scrambling-around of
> > circuits, cutting of p.c.-board traces, adding jumpers, etc.  
> Dog-work,
> > like much of the previous toil leading up to the present design.
> > 
> > But basically, my "current-loop" scheme works and--as soon as we 
> clear
> > this season's frenetic activities, I'll get to that dog work & 
> advise.
> > No offense to dogs.
> > 
> > KCH