Re: [TCML] DRSSTC ring-up

[Steve Ward <steve.ward@xxxxxxxxx>]

Hi Antonio,


This is a text that I wrote earlier this year about drsstc tuning, poles,
> etc:
> http://www.coe.ufrj.br/~acmq/tesla/drsstcexcitation.pdf
> I design the system assuming no losses, aiming for complete energy transfer
> after a given number of cycles, leaving no energy in the system except in
> the output capacitance, the same idea of the conventional Tesla coil. The
> design is then unique. This results in the primary tuned slightly below the
> secondary. The text shows that the best tuning for efficiency is between
> the poles, and that a design is always possible for a given maximum input
> current. Zero-current switching comes naturally with the design. There is a
> problem with this tuning if a PLL is used, because the PLL may become
> unstable (I don't see much sense anyway in using a PLL with just a few
> cycles to lock). A simple comparator controlled by the input current (maybe
> after some filtering, but the primary circuit is a filter already)
> apparently works correctly in simulations. I have tried the design
> experimentally only with a fixed frequency driver. It works correctly too,
> but I didn't try the effect of long streamers that would significantly
> detune the system.
>

I must have missed this writeup the first time around.  Excellent study
there and i think applies when trying to design a very efficient DRSSTC,
but perhaps not best for designing one that makes the largest possible
sparks (the voltages would be too high if designed by your methods i
think).  I like the final part about loading and what you call "phase
reversion".  Ive actually run into this problem when streamers get too big
under some tuning conditions.  In my case i was using a driver that has
traits similar to a simple comparator based feedback circuit, and something
that has "memory" of the previous frequency used (this is added for
stability reasons on a digitally clocked system).  Anyway, the spark woould
grow and the primary current would eventually die out to zero and self
oscillation would stop for some time until it re-started at the other pole
frequency after some fairly chaotic switching of transistors!   The driver
loses proper control for some time, but luckily the load current is nearly
0.  My spice simulation of the expected loading conditions revealed the
problem, not enough phase margin so oscillation simply couldnt happen there
anymore and the system wasnt smart enough to jump to the other pole in a
clean fashion.  I think that relates to what you said about it "could work
correctly".

Its amazing how interesting "tuning" becomes when the system becomes more
advanced than SGTC.  Its still basically "tune for maximum smoke" but now
there are just more ways to get there, and some of them can be dramatically
different than others!

Steve


>
> Antonio Carlos M. de Queiroz
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