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RE: SSSSTC Coil questions for Mr. Steve



Original poster: "Steven Ward" <srward16-at-hotmail-dot-com> 

Dave,

I will add the schematics soon.  I have them made, i just need to upload 
them to the site.

Anyhow, there IS a big delay from all the stages in the circuitry.  About 
700ns from the feedback going high, until the mosfets are ON... yikes... i 
know what people are thinking, that is bad!  Well, its still working, 
though im sure im hard switching a bit of current due to this.  Im not sure 
how to remedy this (aside from reducing the delays as much as 
possible).  Perhaps a phase shifting circuit could work, but im not sure if 
i like the idea of that... seems like a good source of headaches.

At one point i did ponder adding on more stages to the output using 
IRFP460s.  It seems to me that the law of diminishing returns would apply 
here.  Basically the idea with the higher voltage was to get an easier 
impedance match between the coils (so im not using a 2 turn primary or 
something).  Also, reduce other primary losses (though im sure they are 
extremely low in a SSTC).  I tested the cat 5 wire that i used for the GDTs 
with a 9kv NST running 140V input.  It sadly outlasted the NST!  i came 
back a few hours later and my NST was dead while the wire was still prestine.
The test was simply a twisted pair of conductors, each going to one side of 
the NST.  I know things get much different at 115 khz, but the cat 5 sure 
has proven itself to me!

I still need to work out some details, then i can run this machine up to 
240 and possible 280VAC input for about 1580V (3160Vp-p) on the 
primary.  Watch out!

Steve


>From: "Tesla list" <tesla-at-pupman-dot-com>
>To: tesla-at-pupman-dot-com
>Subject: SSSSTC Coil questions for Mr. Steve
>Date: Sat, 17 Jan 2004 20:55:11 -0700
>
>Original poster: David Sharpe <sccr4us-at-erols-dot-com>
>
>Hi Steve
>
>I've been watching from the sidelines.  You've got an excellent
>performing coil topology there.  If you can keep the drivers
>modular, you could theoretically scale up to limit of GDT hold
>off voltage.  That limit could be as high as 2.5-3kV (5-6kV
>pk to pk drive), which is about 20X higher then most SSTC.
>I secondly would like to see detailed schematics
>particularly on auto tuning and gate drive topology to maintain
>timing on circuit.  When I saw this topology a year ago at
>APEC2003, it looked promising, you've proven it can work
>to run a TC.  Way to go!
>
>Regards
>Dave Sharpe, TCBOR/HEAS
>Chesterfield, VA. USA
>