RE: ZVS Switching and my new SSTC HV Design

["Tesla list" <tesla-at-pupman-dot-com>]

Original poster: "Mccauley, Daniel H by way of Terry Fritz <teslalist-at-qwest-dot-net>" <daniel.h.mccauley-at-lmco-dot-com>

Also:

Contrary to popular belief, oscillator-based SSTC's do NOT switch in
a ZVS fashion, even if the system is in perfect tune. The signal from
the control IC (TL494 in many designs) is not locked onto the
secondary coil output. The two signals drift in and out of phase in
respect with each other...the end result is that MOSFET's switch all
over the place in respect to the sinusoidal output of the resonator.
And since this current/voltage relationship is directly coupled to
the primary, you see what happens. Only feedback or PLL coils switch
in a ZVS fashion. And only PLL coils can switch at *perfect* zero
crossing. Why? Big MOSFET gates cause an RC time delay with feedback
coils. This has the tendency of pushing things out of phase, and more
towards non-ZVS. The bigger the MOSFET gate capacitance, the more
non-ZVS in a feedback (antenna) coil.


 >>>>>Also, ZVS switching isn't really necessary for SSTC work.  ZVS is
typically used in applications where efficiency
is of utmost importance (brick-size DC/DC converters) or where very high
switching frequencies are required (>500kHz).  For SSTC work, its not really
needed.

In my experience with my three SSTCs (including my new one i'm working on),
feedback circuits, exotic switching toplogies, and other exotic
modifications really won't buy you much.  The key to getting BIG output is
to switch a BIG voltage.  Period.
Design your SSTC for high voltage and you are on the path for some very
large arcs!

My new SSTC design yields a series-stacked FET bridge consisting of (4)
1000V IXFN24N100 FETs.  I haven't connected it up to my resonator yet, but I
am already successfully chopping the output of a MOT (2400VAC)
half-rectified with 2kW test load at 200kHz!

The key to getting the large output is going to be using series stacked FET
switches and much higher voltages.  As the full bridge topology generally
limits you to only one FET per leg, voltage output will always be limited
until some higher voltage FETs (2kV and up) are available.






If the two signals (HV output and oscillator signal) are
locked...then your logic electronics is probably responding to
conducted/radiated noise from the output??

Comments/flames welcome...

Justin Hays, www.hvguy-dot-com

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