Re: PLL-controlled SSTC?

["Tesla list" <tesla-at-pupman-dot-com>]

Original poster: "Jolyon Vater Cox by way of Terry Fritz <twftesla-at-qwest-dot-net>" <jolyon-at-vatercox.freeserve.co.uk>

Re:  the TLC555 suggestion I have used regular bipolar 555 timer as a 50/50
mark-space astable in a very small magnifier-type setup -though not as yet
in a PLL configuration.

the astable output is amplified by a common emitter stage to boost current
into the primary of a driver transformer

to generate antiphase outputs in the two secondaries, each of which are
connected between bases and the emitters
of the complementary PNP and NPN power devices in respective "legs" of an
emitter-follower
H-bridge via 0.27uF capacitors; the H-bridge then drives an air-cored step
up transformer which excites the "extra" coil.

Now, it is possible to apply duty-cycle control to a 555 as well as
frequency control but my unsderstanding is that in my present setup this
would simply  unbalance the currents flowing in the H-bridge and serve no
useful purpose. Am I incorrect on this detail? Is it not true that  when
H-bridges are used in TC (or inverter) service, it is necessary that the
output waveforms be symmetrical so that the overall current flowing in the
transistors will be equal?

(emitterOriginal Message -----
From: "Tesla list" <tesla-at-pupman-dot-com>
To: <tesla-at-pupman-dot-com>
Sent: Saturday, July 06, 2002 1:55 PM
Subject: Re: PLL-controlled SSTC?


> Original poster: "rob by way of Terry Fritz <twftesla-at-qwest-dot-net>"
<rob-at-pythonemproject-dot-com>
>
> Tesla list wrote:
> >
> > Original poster: "Daniel McCauley by way of Terry Fritz
> <twftesla-at-qwest-dot-net>" <dhmccauley-at-spacecatlighting-dot-com>
> >
> > After some thinking. . .
> >
> > Actually a PLL circuit really wouldn't work in this case.  The problem
is
> > that when a arc streamer propogates it actually changes the resonant
> > frequency of the secondary and this ultimately kills the propogation of
the
> > streamer.  The output frequency of the oscillator doesn't really change
much
> > during such a propogation.
> > A PLL on the output oscillator really wouldn't do anything since the
> > frequency is relatively constant.
> >
> > What would be needed is some kind of feedback to detect when the output
> > current begins to drop or something similar.
> > Richie Burnett uses a simple technique to simply feed back some of the
> > output voltage back into the feedback of the TL494 chip (See his
website).
> > Its not very elaborate, but pretty effective for what its worth.
> >
> > Dan
>
> I am not convinced that this wouldn't be a worthy project.  You could
> use one of the old Motorola Phase-frequency detector chips (MC4044?)
> hooked up to a TLC555.  The 555 has a pin already for VCO shifts.  Maybe
> an LM565 (part# ?) PLL would even work.
>
> As long as you kept the VCO range small, harmonics would not be a
> problem.
>
> And since modern FET drivers switch at CMOS levels, the interface
> wouldn't be difficult.
>
> The TLC555 and output from a "SMPS current transformer" sensing coil
> current would be fed into the phase-freq detector.
>
> Rob.
> --
> -----------------------------
> The Numeric Python EM Project
>
> www.pythonemproject-dot-com
>
>
>
>