Re: phase locked loop SSTC

["Tesla list" <tesla-at-pupman-dot-com>]

Original poster: "Jan Florian Wagner by way of Terry Fritz <twftesla-at-qwest-dot-net>" <jwagner-at-cc.hut.fi>

Hi,

> Jan Florian Wagner wrote:
> > ... phase locked loop seems to work if and only if the upper
> > freq of the VCO is set to the unloaded reso freq of the secondary
> > and the lowest freq is maybe 50kHz below this (300kHz coil).
> 
> How far above Fres can you set the upper freq before problems occur,
> and what are those problems?

Can't set it above f_res more than 10-20kHz. The problem is with a high Q
coil it looks like the PLL lands either on the lowest or highest freq in a
"bad case", because there's no proper signal from the current sense.

I actually have it working now, but there are some oddities:

- the phase is not correct, which may be due to IR2110 100ns delay as well
as the current sense xfmr. Sometimes the PLL decides to lock to 90deg
phase shift, and at other times 0deg. Arbitary. Despite phase comp II
which maintains 0deg shift throughout entire freq range.

- with ground strikes the secondary jumps to the second harmonic!! very
odd. The current is sinusoidal but two times the driver frequency.

This strikes me as especially bad for a self-oscillating system with no
frequency limit - locking on to 3rd harmonic isn't nice... 

Output is not impressive at all, though... Maybe because 300-400kHz on
PVC pipe is a bit lossy... ;o)

> Does anyone have any good links?

The CD4046 datasheet would be one way to start, maybe?
 
> > not a "plug'n'play"-for-any-secondary thing like I had wished...
> That would be tricky, for impedance matching as well as frequency
> control.  

I never understood this impedance matching business in conjunction with 
SSTCs - I mean, driving at 50% duty always (i.e. NO current limiting via
PWM) and always in-tune guarantees no power is reflected, so impedances
are always matched. 
Of course if you were to restrict the primary side impedance by current
limiting then there is the risk that impedances aren't matched and primary
side heating losses go up. And ok, mosfets can't handle infinitely high
currents either and can blow up and generate a "mismatch".

Or am I missing something here?

cheers,
 - Jan

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