Re: S.s. MOSFET-driving

["Tesla list" <tesla-at-pupman-dot-com>]

Original poster: "David Sharpe by way of Terry Fritz <twftesla-at-qwest-dot-net>" <sccr4us-at-erols-dot-com>

Ken, Terry, All

Check International Rectifier website (www.irf-dot-com) on FET
driving info. On Semiconductor (ex. Motorola Semiconductor
Group-www.onsemi-dot-com) and IXYS (www.ixys-dot-com) also
have app. information on FET and IGBT driving techniques.

I first started working with 1st generation power FET's in
early 1980's, and I have built power switches up to 500A
(1400A pulse at 30V) using IRL3803 30V 140A FET's.
Keys for reliable driving without oscillations is you MUST
put a slow down resistor in series with the gate from the
driving circuit, and no larger then a 5K pulldown to the
source.   The gate speed control resistor according to
On-Semi / IRF should be a minimum of 5 ohms, and I
know at work we have used as large as 100 ohms
successfully.  Resistor size controls dV/dT speed of
switching during turn on and turn off.

Additionally, across gate to source, place a bidirectional
zener clamp (as Digikey part no. P6KE16-CACCCT-ND,
16V).  Max Vgs on Power FET's is generally +/-20V, if you
overvolt a Vgs gate, you can have reduced gain, or FET will
turn on in active region (may fail shorted).  Another trick,
especially with multiple FET's in parallel is to pass gate
lead through a small ferrite bead to prevent high e-field
impulses from stimulating FET into self oscillation.  I have
not seen that problem on circuits I have built (either DC
switching, or max power frequency switching of 400 Hz).
In the later condition, typical 90% on time was 20usecs,
and off time was 5usecs, with 100 ohm series resistor and
maximum power frequency of ~125Hz.  Another important
point in high power paralleled switches is to make the circuit
physically symmetrical.  Asymmetric circuit layout may lead
to circuit impedance parasitics that will stimulate very
ugly mulitple megahertz self oscillations between adjacent
devices (a squeal, some smoke, a snap, and lots of
pergatory comments...  :^C   )

Also be aware that if you try to make the FET switch
"FAST", the demons of circuit Ldi/dt will rear their heads.
I have seen overshoots as much as 30V on a circuit that
was predominately resistance (no intentional inductance)
that was powered by 5V, and the total PCB power circuit
loop length was considerably less then 6".

Regards
Dave Sharpe, TCBOR
Chesterfield, VA. USA

Tesla list wrote:

> Original poster: "Terry Fritz" <twftesla-at-qwest-dot-net>
>
> Hi Ken,
>
> Richie has a bunch of tips for protecting TC FETs too at:
>
> http://www.richieburnett.co.uk/mosfail.html
>
> Cheers,
>
>         Terry
>
> At 12:43 PM 12/31/2001 -0500, you wrote:
>
> >
> >>
> >> Hi Ken,
> >>
> >> You may want to see Marco's discussion of IGBT drive problems and
fixes at:
> >>
> >> http://personal.inet.fi/atk/dncmrc/
> >>
> >> I found that I needed series resistance (100 ohms) to slow down the IC's
> >> switching speed or they would blow the IGBTs.  The IC designers wanted to
> >> force
> >> the gate capacitance to the voltage they want instantly and they did a bit
> >> "too" good of a job ;-))  That is the only trouble I ran into but I don't
> >> have
> >> transformers and such (fiber optic).
> >>
> >> Cheers,
> >>
> >>         Terry
> >>
> >>
>

==========SNIPOLA

>
> > Terry-
> >
> > Thanks for the tip; I'll check it out.  It's likely that the 100 ohm
resistor
> > damps out destructive oscillation, which will occur when the low-Z and very
> > fast drive signal meets up with the MOSFET's gate capacitance.
> >
> > Ken