Re: Zero Crossing Circuit

["Tesla list" <tesla-at-pupman-dot-com>]

Original poster: "Jon Tebbs by way of Terry Fritz <twftesla-at-qwest-dot-net>" <jgtebbs-at-eos-dot-net>

Hi Barton,

I've inserted my comments below:

Tesla list wrote:
> 
> Original poster: "Barton B. Anderson by way of Terry Fritz
<twftesla-at-qwest-dot-net>" <tesla123-at-pacbell-dot-net>
> 
> Hi - whoever posted the schematic at the following url:
> <http://www.macinhouse-dot-com/tesla/stsg_zc_driver.gif>http://www.macinhouse.c
> om/tesla/stsg_zc_driver.gif
> 
> My humble appologies. I was going through mail, brought up the schematic,
> deleted the email, then looked at the schematic and wanted to reply. Sorry
> about that.
> 
> Can you verify the following for me? (I'm curious if I'm getting the
circuit):
> 
> It looks like the zero-crossing is taking place at Q1 and Q2. These
transistors
> are used to drive the input of pin 2 of the 555 at zero-crossing.

This is correct. Diodes D1 and D2 along with R1 & R2 maintain Q1 base in
conduction until the zero crossing occurs. Q1 and Q2 buffer the rising
and falling edges to produce the trigger pulse to the 555.

> (Couldn't a
> comparitor be used here to replace Q1, Q2, and the 555?).

Yes. In the interest of keeping high impedance devices out of an
otherwise harsh RF environment, I chose to forgo the use of a
comparator. In an even simpler approach, one could conceivably drive the
trigger pin 2 of the 555 from the D1 D2 network, with the addition of a
12 volt zener to clamp the half waves from exceeding Vcc. The rise and
fall times of this method would be rather slow and there would be
additional delay introduced due to the 1/3 Vcc threshold that would add
to the minimum delay obtainable.

> Anyway, the detected
> zero crossing input is clocking the 555 output, of which is driving the
base of
> Q3, whose 50k pot is adjusting the voltage ratio for the base of Q3.

Point of confusion: There is no connection between R6, R7 and R8. This
is a cross-over, R6 connects to R8 forming the variable time constant
with C3. The pin 3 of the 555 connects only to R7. This provides drive
to the Q3 emitter follower which then provides drive current gain for Q4.
 
> It appears this is a circuit where a delay is used (variable R6, R8, and
C3 for
> when Q3 turns on) which defines when Q4 dumps the voltage across C4 and R10
> through the primary of the HEI.

Q4 is in conduction from the time of each zero crossing until the preset
delay. Q4 is then switched off, just like in an automotive ignition
system. C4 is just a snubber and D5 the usual damper. Think of this as
an Horizontal Output stage. Same principle, the H.O.T. maintains current
flow through the flyback transformer primary and when it is switched
off, the flyback does it's thing.

> I guess this is what I'm getting at.
> Is this circuit detecting zero-crossing, then delaying "from zero" when
the gap
> will fire?

This is correct.

> Thanks for any help with this
> (I'm not the greatest at circuit theory),
> --
> Barton B. Anderson
> <http://www.classictesla-dot-com>http://www.classictesla-dot-com
> 

Thanks for the opportunity to clarify the finer points. It is good to
see the interest in this.

Cheers,
-- 
Jon G. Tebbs
<jgtebbs-at-eos-dot-net>