Re: Solid-state status

["Tesla list" <tesla-at-pupman-dot-com>]

Original poster: "Marco Denicolai by way of Terry Fritz <twftesla-at-uswest-dot-net>" <Marco.Denicolai-at-tellabs.fi>

Hi.

I guess you are aware of the "trick" of using twisted pairs to drive the MOSFET
gates, using a different return conductor for the load current. Twisted
pair has
got very low inductance. You can implement the same trick also on a 2-layer PCB
board.

Then there is the paper I wrote about IGBT faults and solutions at

http://www.saunalahti.fi/dncmrc/slrconv.zip

Regards





"Tesla list" <tesla-at-pupman-dot-com> on 17.12.2000 07:03:35

To:   tesla-at-pupman-dot-com
cc:    (bcc: Marco Denicolai/MARTIS)
Subject:  Solid-state status



Original poster: "Kennan C Herrick by way of Terry Fritz <twftesla-at-uswest-dot-net>"
<kcha1-at-juno-dot-com>

Holiday madness being upon us, my T.c. work has slowed.  But some may
have interest in the current problem:  Turns out my gate-drive lines are
too long.  Some ringing but the more serious problem is Miller current at
MOSFET turn-off, causing turning on again of those that are supposed to
be going off, by virtue of the voltage drop in the too-long lines.  Such
turn-on is a major no-no, of course, so I am having to re-do my
gate-driving scheme.  It will take some semi-major scrambling-around of
circuits, cutting of p.c.-board traces, adding jumpers, etc.  Dog-work,
like much of the previous toil leading up to the present design.

But basically, my "current-loop" scheme works and--as soon as we clear
this season's frenetic activities, I'll get to that dog work & advise.
No offense to dogs.

KCH
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