Re: [TCML] DRSSTC weird waveform behavior

[Carl Noggle <cn@xxxxx>]

It may be also that if there is no dead time between phases the top 
devices will turn on for a split microsecond before the bottom ones turn 
off, leading to a large current spike (known as shoot-through).  A 
half-uS of dead time or so will take care of this.  It also appears that 
there may not be adequate power supply bypassing--you need a big honkin' 
cap to feed the bridge.  The gate drive should have only enough 
resistance to avoid oscillation in the gate waveform, normally less than 
an ohm.  Even more important is to minimize the gate drive inductance, 
which means VERY short and wide leads from the driver to the gate.

---Crl





> Justin forgot to mention that he has gate resistors bypassed by UF
> diodes so his effective turn-on resistance is 10ohms and turn-off
> resistance is 0ohms. Phase lead feedback is good idea but still you
> dont need blistering fast switching speed.
>
> V = L * dI/dt should explain why slowing down is good idea. I have
> CM300 drsstc engine and i run my gates at little over 1µs rise time at
> 60kHz. It has been tested up to 1800Apk without any troubles. After
> crude phase lead adjustment i still had some overshoot at gates and
> inverter output + some common mode noise issues. All that went away
> when i reduced switching speed by factor of 3 or something like that.
> My current way to determine "good enough" switching speed is to slow
> it down untill switching losses become problem and and then speed it
> up just a little bit.
>
> These large power bricks have pretty large internal inductance too
> (easily 50-100nH) and there is nothing you can do about it. Switching
> too fast may excite these inductances in resonance with dc bus
>
> Just my 0.02euros
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