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Re: SISG failure report



Original poster: "Gerry  Reynolds" <gerryreynolds@xxxxxxxxxxxxx>

You can also interleave the connections to the die as well as the package terminals to reduce the inductance. To make this effective all the way to the PCB, you'll probably need to do surface mount. Flip chip technology works miracles for the die attach portion of the inductance. Two layer PCB traces can also be plagued with inductance.

Gerry R.




Original poster: Vardan <vardan01@xxxxxxxxxxxxxxxxxxxxxxx>

It's not the "die"... We did not put down 30 wire bonds to the die for current, it was "inductance" that we had to defeat!!! Many GHz guys "twist around" wire bonds to "adjust" inductances... I did too, I works good :-))