Re: SSTC- feedback vs. none

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Original poster: "K. C. Herrick" <kchdlh@xxxxxxx>


I'm posting /temp/Half-br_res-load.jpg, a simulation-schematic of my 
not-yet-fully-debugged feedback scheme--but modified a bit from my 
present hardware.  It may be interesting to some as a model for a 
primary-feedback sstc system.  I've been playing with it in order to 
clarify whether phase-shift and/or IGBT turn-on & -off times are 
going to be bothersome at 100 KHz, in affecting the feedback and also 
causing turn-on/off away from IGBT-current zero-crossings.

http://www.hot-streamer.com/temp/Half-br_res-load.jpg

>From this simulation, it would appear that these might not be 
problems.  I've included resistors R3 and R11 to delay IGBT turn-off, 
in simulation of the real case where turn-off time exceeds 
turn-on.  With those included, I see full half-sine current waves at 
the locations marked I1 & I2 and no common-mode spikes (and with 
TX1's outputs crossing over at 0V, as they should).  With R3 & R11 
removed, still no spikes but the IGBTs turn off at about 30% of peak 
current (while still turning on at zero-crossing).

In either case, the feedback works just fine--with, it must be noted, 
load resistors R17 and R18 included.  Without those, there is overlap 
of the two TX1 outputs at every other transition, resulting in 
common-mode current spikes.  I don't know if that's an anomaly of the 
simulation, or what.

TX1 exhibits a significant phase shift, primary: secondaries--about 2 
us at 100 KHz, to ~90% of the secondary voltage peak, with k = 0.9 to 
0.95.  And the feedback voltage across C12 is exactly 90 degrees out 
from the primary current so that's another 2.5 us.  I suppose those 
two shifts together make up ~180 degrees, allowing loop-feedback to 
take place.  C12 is just to provide a bit of filtering; it doesn't 
affect the phase shift materially.

[The Q5 and Q2 circuits in the hardware are for shutting off the 
IGBTs' + drive between sparks, with the aid of opto-isolators not 
included in the simulation.  That's so that the starting oscillator 
can keep capacitors C2, C5, C9 & C8 charged up between 
sparks.  Rather than the 2-transformer primary-current-sensing 
circuit that I presently have for feedback, I tried out here a 1-turn 
coil, simulated as being wound along one turn of the primary.  That 
works nicely and is surely simpler than a discrete transformer or 
two.  If I decide to modify my hardware to that effect, I'll probably 
install a twisted-pair of conductors; one will provide the feedback 
signal and the other will drive an existing bridge rectifier for 
overcurrent-sensing.  And in the hardware, of course, I have an 
H-bridge, driven by a 1:2:2:2:2 transformer.]

Comments welcome, as always...

Ken Herrick

-------------------------------------------

I'm also now posting Half-br_res-load_waves.jpg, which shows the 
pertinent waveforms around the feedback loop.  Note that the C12 
voltage, as a starting point, is 90 deg. out from the primary current 
and the TX1 primary voltage is in phase with the C12 voltage, both as 
would be expected.  Then there is a delay until the TX1 secondary 
voltage appears, and then a further delay to the IGBT gate-voltage rise & fall.

http://www.hot-streamer.com/temp/Half-br_res-load_waves.jpg

What's most significant is the delay within TX1.  I find that that's 
caused by the transistors in the two "totem pole" circuits not 
turning off fast enough; the ones that are to turn off draw base 
current for ~1 us while turning off.  Hence, TX1's secondary voltages 
do not rise or fall until that current ceases, due to TX1's inductive 
reactance.

Although my schematic is marked for D44H8 and D45H8 transistors 
(which I am using), the simulation elements are actually Zetex 
ZTX849s and -949s.  I don't know if the turn-off characteristics are 
an anomaly of the simulation elements or if that turn-off delay will 
actually occur in the real world.  I haven't yet gotten to checking 
it in the hardware but I  wonder if anyone has insight into this in 
the interim.  Absent that delay, the circuit likely will not 
oscillate (at least, not efficiently), due to incorrect phasing thru 
the loop.  But retaining my existing current-transformer circuit 
instead of the voltage-pickup coil should correct that since it 
(apparently) exhibits close to zero phase shift between primary 
current and fed-back voltage.  So absent the delay due to the 
totem-pole circuits, the largest delay in the circuit is the turn-on 
& -off of the IGBTs.  If those could be tweaked, circuit-wise, to 
become approximately equal, then a compensating phase-shift could be 
introduced elsewhere in the loop, to effect turn-on and -off at exact 
primary current zero-crossings.  That additional shift is what I'm 
trying to introduce with my digital phase-shifting circuit, 
previously described.

[I might add to my circuit description that the capacitors are kept 
charged, between sparks, thru schottky diodes across the transistor 
base:collector junctions.  I could, likely, have just used those 
junctions for the charging paths but I was not sure of the 
current-handling capability so I added the schottkys.]

KCH