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Re: SSSSTC Coil questions for Mr. Steve



Original poster: David Sharpe <sccr4us-at-erols-dot-com> 

Hi Steve

Tesla list wrote:

 > Original poster: "Steven Ward" <srward16-at-hotmail-dot-com>
 >
 > Okay Dave,
 >
 > Some of your ideas are a bit unclear, but i like the way you seem to
 > envision much more which could be done with this design ;)  I will answer
 > what i can, and question what i dont understand.
 >
 > >I understand this now.  A couple more power circuit questions:
 > >1.  What FET are you using?

<<SNIP>>
---------------------------------------

Thanks for FET info.  Also, any idea what AC input current is on system
when developing 24" sparks (i.e. Power Input?)
---------------------------------------

 > >2.  What is size, type and voltage rating E storage cascade capacitors
 > >      are you using?
 >
 > They are 5uF 400VDC 40L G.E. polypropylene capacitors. High quality ones.
 > So about .4j each at 400VDC (which i eventually plan on running the coil
 > at).  Now, we dont want these caps to discharge much at all on each cycle
 > as i understand it... is this the correct way to think?

----------------------------------------------------------------
Yes, that is correct.  What is your resonant frequency?  If you know period
time, you could calculate a minimum capacitor value (minimal stored energy=
minimal capacitor package sizing) for a given allowable droop.  I suspect
that even a 20% droop would have minimal impact in spark length...
I also simulated in Multisim a 3 stage setup with your current circuit
configuration with 1uF it worked as well.  If you assume 100Khz, this
would be equivalent to 5 microsecond discharge time.  If 10% of E
(40 millijoules) is removed in 5 us would be approximately 8kW (pk)
time number of stages (i.e. WAY oversized). BTW this would equal
about 20V drop across each cap during each discharge pulse.
-----------------------------------------------------------------
<<SNIP>>
 >3.  What blocking diode are you using (P/N, voltage current 
fast  recovery, etc.)?

 >
 > Hmm, im not sure which blocking diode your referring too.  The only fet
 > protection i have are the parallel ultrafast diodes.  Here is the spec
 > sheet for them:
 >
 > http://www.fairchildsemi-dot-com/ds/IS/ISL9R3060G2.pdf
 >
 > I also use them for the diodes that charge the capacitors for each stage.
 > They seem like really nice diodes.

----------------------------------------------------------------
Sorry, you are correct, charging diodes are what I meant.  Thanks.
---------------------------------------------------------------
<<SNIP>>

 > >----------------------------------
 > >Basically wind the primary ONLY on a ferrite toroid. Pass through the
 > >window of the primary toroid a high current copper loop (1/8 to 1/4"
 > >copper tubing is perfect).  At each driver PCB have a toroid with number
 > >of windings for each FET.  Copper tubing would pass through each
 > >of these FET drive toroids.  The copper tubing makes a one turn loop
 > >through the window of all the toroids.  The GDT driver now drives the
 > >entire high current loop, and thereby drives each driver board.
 >
 > WOW! I LOVE that idea! The only thing i worry about is the leakage
 > inductance.  I think it may be worth looking into.  What about just making
 > that copper loop THE primary?  Though i suppose that would mean low voltage
 > but very high current driving it.  I doooo like the idea though, maybe i
 > can test it out ;)
 >
 > >The advantage of this idea is one HUMONGOUS driver could drive 4X
 > >as many drivers and they would be synchronized fairly well to each other.
 > >This would simplify building the isolated gate transformers, and if the
 > >copper tubing is passed through a thick wall PE tubing ( polyflow(R) )
 > >through the interior of the toroid, very good HV standoff (perhaps
 > >5kV or more) could be achieved, cheaply using off the shelf stuff
 > >from Home Depot, Lowes, Wal-Mart, etc.
 >
 > Yeah.  That would be exceptional isolation.  Im still not convinced on the
 > coupling and leakage inductance of such a design, ie, need to see it myself
 > to believe it.

-------------------------------------
Yeak, 10-4 on leakage inductance.  But if you have a large enough driver, and
low enough system frequency, shouldn't present that big a problem.  OBTW
this is technique used to generate isolated control voltages for high power,
HV power converters, modulators, SG replacements, etc.  So it is proven
technology (at least at 25-50kHz regime).  LFSSTC gate control... IDK
but might be worth a shot, could greatly simplify making a truly modular
high power driver system... Big boys (Powerex, et al) are getting Vholdoff 
of up to

50kV using this technique, and I've seen radar modulators capable of 100kV+
holdoff (oil immersed) using this technique.
--------------------------------------

 > >-------------------------------------
 > >Ok, imagine your circuit, but build a mirror image with bottom 4X drivers
 > >tied to (-) power with neutral (+).  Tie together at a terminal with two AC
 > >caps.  Repeat on other side of bridge.  While one diagonal pair of drivers
 > >are discharging (driving) the load, the opposite pair are charging the 
caps,
 > >Diagonal drivers swap, now vice versa diagonal pair is driving (in opposite
 > >direction) while previous discharging drivers are now charging.
 > >Vo-N = V*4stages *2  (+/- pk).  So if you doubled number of existing
 > >stages on your current design, voltage would be doubled (at load) but
 > >each driver would still see 4X Vin stress; but most importantly 2X the 
power.
 > >Can sketch up a drawing a Excel to clarify.  I also ran a manual switch
 > >simulation in Multisim and it worked no problem...  :^)
 >
 > I would really like to see a drawing of this.  I just cant make it out in
 > my head what you mean.  I thought i WAS using an h-bridge, but i guess not?
 > Please, drawing would be excellent.

------------------------------------------
Will try to post a simplified "switch stick" conceptual  circuit on my nest on
Hotstreamer by
weekend...  Your present circuit is working like a full bridge based on
simulation.  By
modifying design by adding a +/- 170V PS and (-) charger/discharger you double
voltage (theoretically quadruple power) across load beyond your present 
condition.
Negative is it takes double the parts and a bipolar power supply.  On second
thought
might be better to use fractional transformer (much simpler) to get voltage 
gain
versus
additional switch (and GDT) stages.
------------------------------------------

 > I also dont understand how the drivers are seeing 4X Vin stress?  Maybe i
 > need to see your scheme to understand.

-------------------------------------------
Steve, sorry I was confusing.  The voltage stress seen by each driver is 
the same,
but
pk to pk voltage is 4X Vin.  (based on circuit above)
-------------------------------------------

 > > > >Another possibility is build a "voltage adder" circuit using multiples
 > > of this
 > > > >circuit to drive a driver transformer cascade.  Imagine what could 
be done
 > > > >with 30-60kV pk going into base of resonator like a magnifier!
 > > >
 > > > Im not sure what a voltage adder is, example?
 > >
 > >Look up "Fractional Turn Transformer" in Google.  Imagine 4 large identical
 > >toroids. Wind 1 turn from you present driver (4 in parallel) around each
 > >toroid.
 > >Then wind 'X' turns around _ALL_ four toroids.  Vo ~Vin * 4 * Xturns.  Dunk
 > >whole assembly in oil.  Now what's limiting your drive output voltage?
 > >This
 > >technique is used for linear accelerators, and Klystron drivers.  This 
"drive"
 > >transformer Vo could directly feed the base of the resonator.
 >
 > This is truly insane ;-)  I DID look up fractional turn transformers and
 > was blown away by the concept.  Now my question. MUST they be toroids?  OR
 > would something like an oversized flyback core work? Perhaps if the gap was
 > removed?  I suppose even still ive been seeing large ferrite rings on ebay
 > for not too much (in sets of 4).  I really just cant imagine feeding the
 > resonator so many kv!  And the fractional turn transformer makes it...
 > possible!  The only thing im unsure of, is saturating the cores.  Now, if i
 > was to run some math on this, would i add up the dimentions for ALL 4 (or
 > however many) cores together and say there is 1/4 turn on it?  Or does it
 > somehow still count as 1 full turn?  I guess i need to think about it more,
 > but the idea is really something else.

---------------------------------------
I suspect that  ferrite ring(s) will be needed.  I know Duane Bylund in early
90's built driver transformers using ferrites.  With single turn on each 
ferrite
(and dividing current by 4) you will _significantly_ reduce risk of saturation
since you are making the equivalent transformer "bigger", plus you are
going to be running at a fairly high frequency.  It will probably be a
"build it and try it" situation.  Watch for heating in ferrite rings, oil 
cooling
is probably an excellent idea, not only for Vholdoff improvement.

Worse case, a slot will have to be cut in ferrite ring(s) to prevent 
saturation.
---------------------------------------

 > Dave! why arent you building some of these ideas!  And if you have been,
 > can i see?
 >

------------------------------
Been working on several projects here trying to clear to way for some of these
ideas to be built... I'm contemplating how to "package" this system into a 
truly
modular, expandable system.  The more modular the system is, the lower the cost
to make (and expand).
--------------------------------
 >Best Regards

 > >Dave Sharpe, TCBOR/HEAS
 > >Chesterfield, VA. USA
 > >