Re: phase locked loop SSTC

["Tesla list" <tesla-at-pupman-dot-com>]

Original poster: "Steve Greenfield by way of Terry Fritz <twftesla-at-qwest-dot-net>" <alienrelics-at-yahoo-dot-com>

You keep saying CD4049, as far as I know the only IC
with this number is a hex inverter. Do you mean CD4046
PLL IC?

What you describe with an 8051 or PIC is a bit more
complicated that what I was picturing but in the end
does exactly the same thing. Many of the PICs have a
hardware PWM built in and so wouldn't need an external
D/A converter. Use that output filtered to drive a
VCO. No phase information, just looking at the peak
response. That is why I said it would have to wobble
the frequency back and forth in order to keep track of
the peak.

The simple 4046 PLL circuit I described is meant to be
designed so that the lock range is wide enough for an
individual secondary, the potentiometer would only
need to be adjusted when changing secondaries. I don't
know just how far off frequency the secondary goes
during arcing, that would be important to know.

Steve Greenfield


--- Tesla list <tesla-at-pupman-dot-com> wrote:
> Original poster: "Jan Wagner by way of Terry Fritz
> <twftesla-at-qwest-dot-net>" <jwagner-at-cc.hut.fi>
> 
> Hi,
> 
> > A link to the MAX038 waveform gen, look down the
> page
> > for information on using it as a PLL, specifically
> for
> > "frequency-phase detector". It says that this
> > configuration is resistant to locking in on a
> multiple
> > and always starts at the lowest frequency in the
> > absence of a signal.
> 
> While the chip's 20MHz bandwidth and three output
> sig waveforms is
> very impressive, so is it's price... ;o) You
> probably wouldn't be
> using it for beyond 500kHz (too bad TC performance)
> anyway?
> 
> Basically, the poor man's CD4049 is not supposed to
> lock on to a
> direct harmonic either, when you use the phase
> comparator II (0deg
> phase shift always). Ok but you're right that when
> it looses lock then
> the CD4049 will keep hanging at the maximum
> frequency, not start from
> lowest freq again (well, a comparator for peak VCO
> input voltage and a
> discharge transistor for the VCO input cap could
> actually solve this).
> 
> > Perhaps a solution to using a 4046 PLL is to make
> it
> > have a fairly narrow auto range, but put a manual
> > coarse control.
> 
> Yes, this certainly works! One pot for frequency
> setting from "R1" pin
> to ground, and a fixed resistor for a fixed
> bandwidth placed between
> the "R1" pin and the "R2" pin. Phase shift is yet
> the problem. As well
> as the (small) effort of retuning pretty often.
> 
> > Using a PIC as one person suggested, you could
> tune
> > the VCO in the MAX038 (0.1Hz to 20MHz!) across a
> band
> > and look for the peak, then settle on the peak.
> The
> > PIC could then "wobble" the frequency up and down
> > slightly, keeping the peak in the center of the
> > wobble. This should then follow changes due to
> arcing
> > and nearby objects changing the resonance.
> 
> The idea I got with PIC (better yet, a flash 8051 to
> get more I/O
> pins) is to let it steer a 14 bit or so DAC which
> then gives 500kHz /
> 16384 = 30 Hz per step (maybe too high resolution
> already?). The DAC
> sets the CD4049 VCO input voltage. 
> To find out if we're locked or not, one could use
> the CD4049 included
> phase comparator again and the current sense input
> from the TC sec
> coil base. The phase comparator and it's loop's
> output voltage is
> compared to the actual DAC output voltage with two
> comparators. This
> gives two bits, "below Fres" and "beyond Fres", as
> tuning indicators
> back to the PIC/8051. If both are same (0, or 1)
> then things are in
> tune. No frequency wobbling should be necessary.
> 
> The benefit: no potentiometres to adjust when
> plugging in a new
> secondary or primary. Plus neat LCD display with
> frequency information
> :o) And the program can be smart enough to "scan"
> for F_res and also
> prevent driving the harmonics.
> 
> Now if there only was some easy way to get rid of
> that unnecessary and
> even disturbing phase information... maybe a
> two-series-CD4049
> setup... I don't think that a simple RCL phase
> shifting network is
> good enough because it is freq dependent... *sigh*
> 
> Lets see maybe I can try this PIC/8051 thing out
> already during next
> week....


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